Intel gets worse, but Power11 might get better


Just in case we needed any more reassurance we made the right move with OpenPOWER: Phoronix is reporting that Intel is about to get even more restrictive with firmware. For as much flak as Intel (deservedly) takes over the Intel Management Engine and other closed highly-privileged blobs, the actual Firmware Support Package has so far been open source and royalty-free (it's what's layered on top that's the problem). There isn't a smoking gun or significant direct context in this Twitter thread, but the issue seems to be around the upcoming "Scalable FSP" architecture. Previously, open source firmware had control on initialization and could call into the closed blobs (or not) as necessary, but FSP 3.0 seems to invert this, giving a new closed blob control to call into the open source firmware (or not). This lets Intel cut projects like Coreboot on x86_64 out of the picture, and can only be seen as a way to directly subvert their operation. A lot of this stuff is under NDA currently but as systems incorporating FSP 3.0 start appearing we should begin to get a clearer understanding.

By the way, don't expect AMD to act any better. Remember that they're the company bringing you Pluton: quoted from the article, "Pluton will also prevent people from running software that has been modified without the permission of developers." It wouldn't be surprising to see AMD's Platform Security Processor pick up additional lock-in capabilities to reinforce this and other vendor controls.

Meanwhile here in the computing underground, we have our own problems with Power10, but there may be some light on the horizon for Power11. It was always a mystery after POWER8 and POWER9's completely open firmware why IBM would take a sudden wrong turn with Power10, but this unsubstantiated post from the same thread (if it's not wishful thinking) suggests COVID staffing issues rather than philosophical concerns were to blame for IBM using off-the-shelf vendored IP blocks requiring the existing blobs in its firmware.

I don't know who that is, or what internal events at IBM they're privy to, so it should be taken with a grain of salt. (If they read this blog, feel free to follow up in the comments or with me in E-mail.) Still, it makes more sense than IBM suddenly slamming the door on OpenPOWER after the tremendous goodwill built up with POWER8 and especially POWER9. It does also suggest, however, that the situation with Power10 is more or less baked in. The roadmap for POWER9, currently the OpenPOWER architecture with the widest install base, basically blew up and the long-promised POWER9 AIO "Axon" or "Axone" never arrived. I'm predicting that Power10 will have a smaller install base than POWER9 because it's still IBM-exclusive, no other vendors so far have announced machines, and Raptor (the only "low-end" vendor of OpenPOWER workstations) has said they won't ship a Power10 system with blobs. If there wasn't enough money on the table to release Axon for IBM's biggest OpenPOWER ecosystem, there won't be for a newly-freed "Power10+."

But there's plenty of time for Power11, possibly landing in the 2024-5 timeframe, just in time for POWER9's technological ebb. And if simple humanpower really was the reason IBM took shortcuts, hopefully their staffing and design teams will be in a much better place by then (wars, pestilence, locusts and inflation notwithstanding). It would come just in time because what makes OpenPOWER a compelling alternative to x86_64 and Apple ARM (and what so far has eluded RISC-V) is performance. I'd like to see Power11 continue to keep us in the game — but without compromises this time.

Comments

  1. Well. I'm really glad I didn't have any plans to continue to use x86_64. Even if POWER9 is the only option until 2030 or longer, I'm currently using a dual 800MHz G4; I'm pretty sure I can handle using slightly old tech. Especially since the whole ecosystem is essentially optimized around it or older.
    It's just a shame that Windows is keeping most people with Intel; at least the Steam Deck came out before this, but I'm really going to hope they keep using the same pre-closing chips for at least a few years. This is a pipe dream, but I'd really like it if ReactOS came over to PPC64, even 64le, that way people don't have as much "no Windows, no way" excuse to stick with x86_64. Haiku would also be nice, but it's also pretty foreign to most people, even if it's in reality simple enough to pick up in a few hours.

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    1. I too would like to see Haiku come to POWER. There is some MacPPC code in Haiku, but needs a lot of effort to bring it to POWER9. But where there's a will, there's a way. It would be great to have part of this discussion on the Haiku forum https://discuss.haiku-os.org/.

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    2. Haiku on POWER9 would be great :-)

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    3. Very much! Even just MacPPC would be great -- I imagine it'd even fly on G3s, but be astronomically fast on later G4s and G5s. R1/B2 is faster than any other OS I've tried (Windows XP, 2000, NT 3.51 for fun but it turned out to be an excellent experience, Puppy Linux, and Ubuntu MATE) on my Dell Inspiron 2200 laptop, even without any driver support other than wi-fi. And that's with the processor ramped down to 600MHz (out of 1600).

      I bet with POWER9, it'd keep them viable for /decades/. Moore's Law is already pretty much dead, after all. Part of why I love Haiku so much is that it has no idea what my laptop's panel is capable of, and lets me overclock it to 85Hz, which combined with the ultra-lightweightness makes it feel like a worthy x86 counterpart/potential POWER successor to Mac OS 9. Just this hyper-responsive OS built as for the home user first and foremost.

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  2. IBM should never have sold its semiconductor division
    https://www.itjungle.com/2022/02/28/april-fools-or-not-ibm-raises-power-systems-prices/

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  3. Hi, original commenter (Developer12) here :) I don't have any secret inside knowledge from IBM, sadly. My comment was in turn based on another phoronix comment from late last year. If I get a chance I'll see about digging it up, but I believe it made a fairly compelling case arguing that remote work (and the transition thereto) drastically impacted the productivity of IBM's design teams. I suspect whoever posted it was probably quite close to IBM. As for the IP blocks themselves, we know that a synopsys DDR4 PHY is in use and there's every indication that the I/O processor is a controller for a synopsys SERDES in the available source code, being used for PCIe 5.0. It's hypothetically possible that a future bridge chip made by IBM or someone else could be used with POWER10 (that is one of the advantages of OMI after all) but I think it's extremely unlikely IBM will redo POWER10 dies to use a different PCIe solution. It would probably require them to rework the floorplan of the chip, and what they have already works. I don't even think it would even be worth pursuing in a new stepping. The best route I can think of would be to reverse engineer the IO blob itself, which is posted to github as a byte array (16 bit words, if I recall). If someone has time to burn they could attempt to analyse it to determine A) is it encrypted/signed and B) what architecture it is and how it works. I think it's virtually assured though that any such effort will draw a lot of anger from synopsys.

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    1. Digging through chat logs with a friend of mine, I did come across this comment: https://www.phoronix.com/forums/forum/hardware/motherboards-chipsets/1277771-not-all-of-the-ibm-power10-firmware-is-currently-open-source?p=1277918#post1277918

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    2. I don't think it's the one I'm thinking of (I recall a comment that was quite a bit more verbose) but it's a start on tracing this info back. The firmware file is here btw: https://github.com/open-power/hcode/blob/master-p10/import/chips/p10/procedures/ppe/iop/iop.fw#L36 and strangely enough it's licenced by IBM as Apache? That seems super weird to me, but I dunno whether or not they'd need to carry forward the original licencing from synopsys. According to the header this was automatically generated from an assembly file by a perl script. Also, according to the git history it seems some versions were a bit buggy.

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    3. Thanks for that Phoronix source. Very interesting. As far as the firmware, I did a little digging on it but I still can't obviously identify the architecture, and it may very well be obfuscated.

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    4. I picked up somewhere that it could be ARCv2.

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    5. It would make sense, considering ARC is synopsys's in-house CPU architecture/ISA.

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    6. The worst case scenario is that these are instructions for a custom undocumented CPU, only trial and error to see what each bit of data does would allow partial reverse engineering of that.

      Is this PHY, or a similar one, used in any cheap consumer products?

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    7. It's PCIe 5.0, so probably not. The same SERDES could probably be used fort other things too, but it's high-spec and expensive so I wouldn't expect anything using it to be cheap. We may see it in intel/AMD CPUs when they eventually move to PCIe 5.0.

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    8. I had a small peek at the firmware file for the IO controller. It's trivially to assemble into a binary using one of the other files there. File thinks it's "zlib compressed data" but I can't figure out how to decompress it, as per [1]. cpu_rec has absolutely no clue what it is. My guess at this point is maybe there's some sort of header, and the zlib data starts further in? [1] https://unix.stackexchange.com/questions/22834/how-to-uncompress-zlib-data-in-unix

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  4. Luke's project seems to be slowly materializing
    https://www.eenewsanalog.com/en/uk-startup-is-raising-funds-for-open-power-processor/

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    1. I wish them the very best! This decade seems to be going very well for POWER. If we get SBCs and, possibly, GPUs with this chip in it, I'd be first to line up for one, probably sell off a few Macs and a Pi 4 for it -- I have too many Macs (10 of them) now anyway.

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