Showing posts from August, 2019

Day 2 keynote and OpenPOWER blows the doors off: royalty-free, open soft-core (RISC-V sweating gallons)

Holy monkeys of Mars. What a morning at the OpenPOWER Summit Keynote (Day 2)! I swear I'm not paid to write this stuff except for the trivial pittance from ads that goes to maintain the domain name (I'm writing this on my lunch break!). I'm just an old-timer Power ISA bigot who's finally seeing the faith pay off. And boy howdy did it.

Let's hit the big news right now. A reasonable criticism I hear of the OpenPOWER movement is that the ISA isn't, or at least wasn't (oops, spoiler), the open part. This is something that RISC-V in particular could claim superiority on. Somebody at IBM was listening, because today Ken King, general manager of OpenPOWER at IBM, announced "we are licensing [the ISA] to the OpenPOWER Foundation so that anyone can implement on top of it royalty-free with patent rights" (emphasis mine). That's a quote right off the livestream. ISA changes will be "done through the community" with "an open governance model" and a majority vote for ISA expansions and changes.

Let me spell out what this means: you, yes, you, can go out and make your own Power ISA chip and not have to pay IBM. OpenPOWER is now truly open.

The other surprise wasn't OpenCAPI; the announcement that it and the Open Memory Interface are moving into the OpenCAPI Consortium is welcome, but expected. What was the other big news is that the OpenPOWER Foundation is moving into the Linux Foundation. There were already close ties between them before but now the OpenPOWER Foundation will be a component of it, albeit still with its own board, governance structure and decision making.

This announcement was definitely not all talk, because they also introduced Microwatt: a Power ISA soft core. Yes! You can drop it in your design as soon as they upload it!

Anton Blanchard from IBM OzLabs in Canberra announced this one, which was actually demonstrated at the show. Now, this is a very basic core: it's single issue in-order (so your old clamshell blueberry iBook will thrash this), and it doesn't even have hardware divide or cache support yet, though this is planned. In fact, the gcc they used was even hacked to not issue divide instructions. But the darn thing actually works. Here's the super-polished block diagram:

MicroPython is provided, so you can drop this into your design and then talk to it. Here it is in the simulator (which took a couple seconds to compute the answer):

On real hardware it is definitely quicker. Here's the core running on an old Xilinx Artix-7 he found doing nothing in the office computing the Fibonacci sequence:

Xilinx was on stage as a sort of sponsor thing, naturally, so they also gave Anton an Alveo to try this on. They crammed forty cores onto it, and then made it say "Hello World" over and over, because that's exactly what I would do with an expensive programmable piece of hardware. (This is where the name "Microwatt" is kind of crummy, because saying "40 microwatts on an Alveo" sounds like a power consumption benchmark.)

The repo as of this writing is not yet live on Github, but should be within the next day or so.

I'm giving Anton a hard time here because his segment actually was the part of today's keynote that impressed me most. Microwatt is real and tangible and you can work on it, and it can scale from hobbyist to enterprise. This is what really put the "open" into OpenPOWER and I was so delighted to see it run.

I will say I see perhaps a little worry from IBM that RISC-V is going to steal the initiative and momentum, and this move (and the open soft core) is their attempt to recapture the vanguard. RISC-V people should actually be happy about this move: at minimum it means they're being taken seriously at the corporate level, it gets more people thinking about open architectures, and the more truly open architectures out there, the more viable and expected the concept becomes. OpenPOWER is the biggest fish in this sea and (with my bias showing) the most powerful, the most ready for migration and the most well-rounded of all of them, but with more water in the pool everyone can swim farther.

After all of that the rest of it was comparatively pedestrian. Red Hat was also there; Michael Cunningham gave a speech which was largely corporate happy talk, but I think he meant it, and I'm hopeful the big blue and little red merger will generate something of the same rich burgundy shade of my SGI Indigo2. Facebook was there too but their presentation was cloyingly light on tech and heavy on smarm, and I think Facebook is ruining the Internet and the psyche of all who touch it, so that's all I'm going to say about that.

The panel at the end was asked to react to the news, which was a little silly, because what else were they going to say? On stage were Derek Chiou, partner system architect at Microsoft and associate professor at UT-Austin; Alan Clark, CTO for SUSE; Tim Pearson, CTO for Raptor; Bapi Vinnakota, engineer from Netronome; Steve Hebert, CEO for Nimbix and Peter Rutten, research director within IDC's Enterprise Infrastructure Practice. They all thought it was cool, because it is cool.

Microsoft was an interesting choice, but Dr. Chiou was complimentary, saying, "we're very supportive of the open source ... Microsoft sees that's where things are going." He also observed, to my interest, that "the interconnect is more important than the ISA." I'm not sure how true that is but I do agree with him that the ability to openly connect is certainly something that's been overlooked, and we need open tooling to make all of this possible. However, the best panel quote was this one, name censored to protect the innocent: "I'm a pretty incompetent developer, so ... [pauses] Python." Yep. Python definitely is the language of incompetent developers. :D (Hey, I got honourable mention in the obfuscated Perl contest one year! I couldn't resist.)

Tim put it best, though, when he said that "it's going to allow people to trust their computers again." That's why we're using OpenPOWER hardware in the first place. Mendy Furmanek, president of the OpenPOWER Foundation, closed up and said that "Christmas has to end sometime," but we got a whopper of a present today. The party's about to get started and IBM deserves all the credit for a move that really is courageous.

Read yesterday's Day 1 coverage for more if you haven't already.

Keynote notes from Day 1 of OpenPOWER Summit NA (and introducing the Condor)

UPDATE: An even bigger announcement from Day 2!

I'm still catching up on everything since I have to do this after $DAYJOB, but the big news from the OpenPOWER Summit keynote among all the great vendors and technology announcements (Day 1) was the last of the POWER9s and the next Raptor system.

Although there were many great pieces in the keynote, the IBM Power roadmap is of course of significant interest. The big one was a subtle but significant change in announced specs. Although one more generation of POWER9 is planned before POWER10, compare this slide to what we posted last year:

For the (now) 2020 "Advanced I/O" POWER9, there's still the same number of PCIe lanes, same signaling speed, same CAPI, NVLink and OpenCAPI 4.0 options. But memory bandwidth went from 350 GB/s to 650.

This whopping difference appears to be from OpenCAPI agnostic buffered memory, implemented as OMI, the Open Memory Interface. For POWER8 IBM introduced Centaur, a way of getting around the inherent limitations of running DDRRAM on a large number of channels by creating an intermediate controller. Instead of driving the RAM directly (as in POWER9 scale-out CPUs like the Sforzas in our Talos II systems), Centaur accepts high-level read and write commands from the CPU(s) and abstracts away the details of getting it to and from the actual DIMMs, including reordering requests and caching them as needed. Each differential memory interface channel on the CPU has its own Centaur which in the current implementation offers four DDR4 memory channels, giving a single CPU up to eight buffered channels to memory and effectively 32 channels to the underlying DDR4. Centaur is also supported on POWER9 scale-up so that people's investment in RAM won't go to waste, but a complex chip like that adds various board engineering constraints, which is why POWER9 scale-out with direct memory attachment was also offered as an option for systems that didn't quite need all Centaur had to offer. (Scale-out's emphasis on PCIe lanes also makes a difference in that market segment, too.)

The idea with OMI is striking a balance between buffering memory and directly attaching it, and AIO POWER9 will be the first CPU to support it. By being "agnostic" it has no ties to any particular underlying memory technology, meaning it can grow as new technologies emerge. OMI runs at 25Gbps per lane and with a latency of just 5ns instead of the 10ns of present-day Centaur. Best of all, it will be non-proprietary, meaning any vendor that wants to make an OMI-compliant memory system can do so and hopefully increase the economies of scale. In fact, one of them did:

Microchip subsidiary Microsemi's OMI-compliant "differential DIMMs" (DDIMMs) should be simultaneously available with the AIO POWER9 next year, using their custom on-board DDR4 OMI interface with an eight-lane channel for a full 25GB/s. I have to say I'm a little cold over yet another RAM standard (looking at the weirdo RAM in my SGI Fuel), but as long as the prices are competitive and the performance is stonking, I could be convinced. Alternatively, the OMI controller could simply be on the board and fan out to regular DIMM slots more or less as things work now, though this robs the standard of some of the future proofing I think it's intended to have.

Back to IBM. The 14nm "Bandwidth Beast," as they're nicknaming the AIO POWER9, will have 16 x8 OMI channels for 25 GT/s and -- there it is -- up to 650 GB/s peak bandwidth. Microchip's buffer won't get that high, though, which is a puzzling thing to pair it with; it seems to top out at "only" 410 GB/s (I know, cry me a river). Onboard will be up to 24 SMT-4 cores, up to 120MB eDRAM L3 cache, 48 PCIe 4.0 lanes (yes, same as our scale-out Sforzas) at 16 GT/s, and up to 48 lanes each for NVLink and OpenCAPI 4.0 attaches. Clearly IBM intends this to replace both scale-up and scale-out simultaneously, so I guess AIO also stands for "all in one":

Oh yeah ... Raptor was there too. Here's Hugh Blemings introducing Tim Pearson:

I'll gently needle Raptor here and say they need a PowerPoint or LibreOffice deity to sex up their slides a bit. But who needs eye candy when you can announce this?

Yes, friends, you too can have a big, intimidating vulture of a computer -- in a form factor smaller than the T2. The Condor is that mythical LaGrange system we heard about last fall. This is a single-socket system to get it to fit in an ATX form factor as opposed to the hulking EATX T2 I'm typing this on, so it won't take advantage of the extra X-Bus capacity, although a multi-socket LaGrange would probably have been too pricey and power-hungry (and too big) for our rarified workstation market anyway. It will have 4 PCIe slots and 8 DDR4 slots (42 PCIe lanes as opposed to Sforza's 48, but double Sforza's four DDR4 channels), which for my money would slot it between the T2 and T2 Lite, and Raptor seems to be encouraging this comparison with the board size. The extra PCIe slot probably would entice some buyers who don't find the Blackbird or T2 Lite expandable enough but don't want to go the full hog, as well as those looking for a less expensive platform to experiment with OpenCAPI (it offers one slot).

We would expect nothing less from Raptor than it to be a fully open, blob-free platform, and it will be available Q1 2020. Price wasn't announced, but my guess is it will be commensurate with that same product placement.

One final miscellaneous note; I don't recall anything said about this, but Raptor seems to have it on its wiki now, so I'll assume the "embargo" is lifted. While you're waiting for the AIO, in the meantime the Sforza DD2.3 stepping should be emerging soon, which will fix various errata including the DAWR for hardware watchpoints. Finally! This should drop right into your existing Talos and Blackbird systems.

More tomorrow, including the BIG ANNOUNCEMENT!
(About all I know is it isn't a laptop.)

Gearing up for OpenPOWER Summit

While unfortunately I won't be able to make the OpenPOWER US Summit on Monday and Tuesday (August 19-20) due to work commitments, apparently a big announcement is in the works and we should know about it on Tuesday. If you're there, Raptor will be at booth S2. We'll dive into it as soon as it's public.

Notable items on the schedule: Hugh Blemings, the executive director of the OpenPOWER Foundation, is of course opening and closing the Monday keynote and Tim Pearson, CTO for Raptor, is scheduled for 9:55. At 1:50pm Justin Lynn talks about using an OpenPOWER Workstation (gee, I wonder which model) as a daily driver in case you don't get enough of that here. Hugh, Tim and others are back for the Tuesday keynote and then the "special announcement" is scheduled for 10:30 (I'll make sure I'm near a computer). IBM talks about the POWER roadmap at 1:30pm and there's an update on the state of Power support for FreeBSD at 3pm. I'm sorry I'll be missing it because it sounds like a great program, but this blog doesn't pay the bills!

Power stuff and other stuff at Vintage Computer Festival West 2019

(A polite request: please ask first if you want to use these photos. Also, I do not intend this to be a complete chronicle of the show; I know many things aren't here or otherwise completely escaped my notice at the time. This is just what I have and what I particularly enjoyed.)

This blog is intended primarily for a Power ISA bigot audience like myself, but that's not to say that we don't find other things interesting. For those of you unfamiliar with VCF after I've been pimping it for the last couple weeks, the Vintage Computer Festival is a multi-location celebration of computing history all the way from vacuum tubes and wire wrap through early systems to "recent but old" or otherwise obsolete. The original West show is a mostly annual summer fixture at the Computer History Museum in Mountain View, Calif. (There are others in New Jersey [East] and Seattle [Pacific Northwest], with affiliated festivals in Georgia [Southeast] and Rome [Italia].) Here we are at this august establishment of computing preservation, formerly the headquarters of Silicon Graphics, across from Google Dzerzhinsky Square and that wacky UFO they're building to fly Larry and Sergei back to Proxima Centauri:

(No, the irony of writing this on a Google-hosted platform is not lost on me, so don't write in about it.)

Besides a number of special speakers and demos and lots of interesting items on consignment, which I successfully avoided buying this year and even sold one of my old Power Mac projects I never got around to, the central portion of the show is the various exhibitions from individual owners, users' groups and even other computing museums. I myself have intermittently put together various exhibits such as my first computer (the TMS 9995-based Tomy Tutor, which I still have), the Apple Network Server and even some weird Commodore artifacts for a number of VCFs over the years.

This year my entry was "RISCy Business," a portion of my classic RISC-based portables and laptops. The machines I had running for festival attendees were a Tadpole-RDI UltraBook IIi (UltraSPARC IIi) running Solaris 10, an IBM ThinkPad 860 (PowerPC 603e) running AIX 4.1, an SAIC Galaxy 1100 (HP PA-7100LC) running NeXTSTEP 3.3, and an RDI PrecisionBook C160L (HP PA-7300LC) running HP/UX 11.00. I also brought my Sun Ultra-3 (Tadpole Viper with a 1.2GHz UltraSPARC IIIi), though because of its prodigious heat issues I didn't run it at the show. Odds are many of you are familiar with these machines either directly or by reputation, so my weird laptops, let me show you them:

The UltraBook played a Solaris port of Quake II (software-rendered) and Firefox 2, the ThinkPad ran AIX's Ultimedia Video Monitor application (using the machine's built-in video capture hardware and an off-the-shelf composite NTSC camera) and Netscape Navigator 4.7, the Galaxy ran the standard NeXTSTEP suite along with some essential apps like OmniWeb 2.7b5 and Doom, and the PrecisionBook ran the HP/UX ports of the Frodo Commodore 64 emulator and Microsoft Internet Explorer 5.0 SP1.

The website that the machines are displaying was custom-written for the exhibit, because period-correct computers demand a period-correct website. I've posted that site, which I'm told works fine on an SGI O2 as well. :)

Overall I think the response was very positive. The hulking SAIC Galaxy generally attracted the most attention (first for its size, second for its very crisp display), but all of the machines were hits with the crowd.

Besides my PowerPC 603e system, there were some other examples of Power ISA at the show. Over on the TenFourFox blog I earlier posted pictures of a Daystar Millenium (a 4-processor 604e Genesis MP+) and a couple Pippin consoles; check out that article for hot pics. The Quake multiplayer exhibit showed how you can easily shoot polygonous monsters on multiple operating systems, including an SGI O2 (appropriate), the Daystar, a Sun Ultra workstation, and two classic IBM RS/6000s. This one is a 43P-150 (Type 7043), a 375MHz PowerPC 604e running AIX 5L. Like AIX 4.1 running on my ThinkPad 860, this was still during the days when IBM was trying to make multimedia workstations out of its high-end machines; the port of Quake it ran at the show was actually done by IBM. A GXT4500p (one of IBM's in-house-designed 3D cards) runs the graphics.

Below it was a Server F50 (Type 7025) with four, count 'em, four PowerPC 604e CPUs at 332MHz. This machine was also running AIX and had the big beefy GXT6500p card for graphics (essentially a dual-GPU 4500; unfortunately neither the GXT4500p nor GXT6500p are supported by Linux). This makes me jelly because the Floodgap POWER6 just has the wussy GXT145, though this is nothing more than a rebadged Matrox G550 and does have open-source support.

As you can see, they acquitted themselves very well destroying things. My ThinkPad 860 had AIX Quake installed on it too, but having no GPU and a less powerful CPU wasn't nearly as much fun.

There were some other notable Un*xy workstationy things there. Here's a venerable SPARCstation IPX running Solaris 7 (the last one to support sun4c) and a modified Mosaic browser:

A pair of SPARCstation 2 systems running SunOS 4.1.4 and NetBSD 8.1, plus a DEC AlphaStation and an unusual InfoServer 150VXT, derived from the VAXstation 3100:

Anyway, that's it for the on-topic stuff. But there was a lot of computing history on display as well. Let's go in order, starting with this exhibit on Charles Babbage's proposed and to this day yet unbuilt Analytical Engine (1833-40). Here we see part of a half-scale model in aluminium and steel, which will eventually be roughly the size of an executive desk and run programs off punched cards as the original was meant to.

A German Enigma encoding device, made (in)famous in World War II and eventually cracked by the Allies. If the serial number (A3995) is correct, then it's this machine, a three-rotor 1935 Enigma I likely used by the Wehrmacht. The plugboard used for additional cryptographic strength is at the bottom with extra plugs stored in the top lid. The second picture shows the actual rotors with the inner cover raised. This machine was in the possession of an auctioneer for presumed future sale, so if you have enough money to buy an Apple I or about fifty Talos II systems, then you should get it and then we can come over and play with it.

An Apollo guidance and navigation system (better known as the Apollo Guidance System, or AGC), also at the auctioneers', also presumably for future sale. Shown here are the various interface and logic modules as well as the famous DSKY, the Display and Keyboard module. The first integrated-circuit computer, it was a 16-bit machine running at 1.024MHz (from a 2.048MHz crystal, divided down) with up to 36kW of core rope ROM and 2kW of core memory RAM. If the serial number "RAY XX" is correct, then it's this unit, which is a thermal mockup with incomplete circuitry.

More on the AGC in a little bit ...

Nearing the microcomputer age were these single-board CPU trainers of various eras. In the left picture, on the left are an HP 5036A trainer with an Intel 8085 CPU, in the middle another suitcase-sized Intel trainer made by Integrated Computer Systems, and on the right a trainer and design tester for the Intel 8080.

In the right picture are two MOS 6502-based trainers; the left one is the famous Commodore KIM-1, with a Revision G unit shown here if the board markings are correct. (This makes it one of the final generation; the original MOS KIM-1 doesn't have a Commodore logo.) First introduced in 1975, the KIM-1 had a 6502 running at 1MHz with 1K of RAM and 2K of ROM, plus the LEDs and keypad shown. Commodore wisely continued to sell them after they acquired MOS Technology until around 1979. I have several KIM-1s myself and they are the oldest computers in my personal collection. On the right is a Synertek SYM-1 (actually the slightly different VIM-1, thanks Dwight Elvey), broadly similar to the KIM-1 but offering additional expansion options. Many people will also remember the Rockwell AIM-1, which was also at the show, and one of which I also have in my collection. I'll have a picture of that a little later.

One of the most famous, and certainly one of the most expensive, 6502 systems out there is the original Apple I. Also a 1MHz 6502 machine, it was unique in that all you needed was a keyboard and television set to use it, plus $666.66 (later $475). About 200 were made, of which about 175 were sold, 63 are confirmed to still exist and only six still work. Incredibly, a number of these working units actually appeared at the show, quietly protected by a security guard to prevent someone from grabbing a couple hundred thousand dollars and running for the exit. These units were shown by the Apple I Club which exists to remind you that you don't have an Apple I.

On the left one of the working systems was showing character graphic images of notable Apple scenes and products. A particularly original idea -- which you could play with -- was an interface card with a Commodore SID 6581 sound chip (the one used in the C64). This was live and running at the show and actually playing music of a sort. In the middle picture you can also see the original "box," the only Apple I system known to still have its complete shipping kit (the return address is 11161 Crist Drive, Los Altos).

A 1981 Xerox Star ("8010 Information System") was also present, the ancestor of things like a GUI and Ethernet, and arguably what gave Steve Jobs the idea for the Apple Lisa. This machine was in working condition. An emulator accompanied it.

There were many microcomputers there, too many to enumerate really. I'll point out the 6502 and 65816 based systems first, though, including an Apple II, IIgs, Atari 130XE, Rockwell AIM-1, Commodore 64 and Commodore 128. (The San Leandro Computer Club had a particularly nice 1980s-style kiosk for their Atari systems.) There was also a strong Tandy Color Computer exhibit with an infrequently-seen Dragon Tano and a whole bunch of Acorn systems along with a really nice Archimedes A3010. However, I will now take this opportunity to dump on the Zilog Z80 systems at the bottom because I'm trying to bait Martin Kukač into a Commodore-Spectrum flame war like those that once raged in the good old days. (I did like the CPC, though, and I own a Timex/Sinclair 2068 to my secret shame.)

Also note the line of Japanese computers, including a Sega Dreamcast development unit and a Fujitsu FM-Towns II playing Genocide 2 ("if you loved Ethnic Cleansing, you'll love Genocide!").

Finally, the replicas. While not historical artifacts themselves, they definitely improve our ability to appreciate those artifacts in a way that doesn't break those artifacts. A case in point is the recreation of the Apollo Guidance Computer including this reproduction DSKY showing plausible sequences as a demonstration, and the supporting hardware they used to simulate the various space modules and subsystems; the AGC they restored is back in Houston. This was truly a monumental contribution to computing history and definitely deserved the Judges' award.

Not a computer, but cool, was this collection of various types of media all the way from huge MO cartridges down to little floppies.

I strongly advise you to show up for the next West-ival (generally first weekend in August), especially as the Vintage Computer Federation is hoping to take up the entire top floor of the CHM for 2020. That means we'll need lots of attendees, lots of help and most importantly lots of exhibits. Have you got something interesting to show? Homebrew, replicas or classic hardware are all welcome. Come on by!

See you next year!

(For a few more pictures, see the entry at TenFourFox Development.)