Showing posts from June, 2024

Chromium Power ISA patches ... from Solid Silicon

It appears that some of the issues observed by me and others with Chromium on Fedora ppc64le may in fact be due to an incomplete patch set, which is now available on Solid Silicon's Gitlab. If your distro doesn't support this, now you have an upstream to point them at or build your own. They include the Ungoogled changes as well, even though I retain my philosophical objections to Chromium, and still use Firefox personally (I've got to get back on the horse and resume maintaining my personal builds now that I've got Plasma 6 back running on Xorg again).

Oh, yeah, it really is that Solid Silicon. You can make your own speculations from the commit log, though regardless of whether Solid Silicon is truly a separate concern or a Raptor subsidiary, it wouldn't be surprising that Raptor resources are assisting since they've kind of bet the store on the S1.

Timothy Pearson's comments in the Electron Github suggest that Google has been pretty resistant to incorporating support for architectures outside of their core platforms. This is not a wholly unreasonable position on Google's part but it's not a particularly charitable one, and unlike Mozilla, the Chrome team doesn't really have the concept of a tier-3 build nor any motivation to. That kind of behaviour is all the more reason not to encourage browser monocultures because it's not just the layout engine that causes vendor lock-in. Fortunately V8, the JavaScript engine, is maintained separately, and reportedly has been more accommodating presumably because of things like Node.js on IBM hardware (even IBM i via PASE!).

Mozilla is much more accepting of this as long as regressions aren't introduced. This is why TenFourFox patches were largely not upstreamed since they would potentially cause problems with Cocoa widgets in later versions of macOS, though what patches were generally applicable I would do so. The main reason I'm still maintaining the Firefox ppc64le JIT patches outside is because I still can't solve these recent startup crashes deep within Wasm code, which largely limits me to Baseline Compiler and thus is not suitable for loading into the tree yet (we'd have to also upstream pref changes that would adversely affect tier-1 until this is fixed). I still intend to pull these patches up to the next ESR, especially since Github is glacially slow now without a JIT and it's affecting my personal ability to do other tasks. Maybe I should be working on something like rr for ppc64le at the same time because stepping through deeply layered code in gdb is a great way to go stark raving mad.

A RISC-V option for your Framework laptop (how about POWER next?)

Many of you have heard of the Framework laptop, a modular system that you can DIY from a mainboard and parts or purchase fully assembled. The designs are open-sourced on Github and Framework has actively been trying to develop an ecosystem around the product.

The part that's potentially most interesting is the mainboard. Framework actively advertises the notion that you can just replace components piecemeal to upgrade, including the logic board, yet keep the same display, port loadout, keyboard, battery and so on if they still work. You can even stick the old one in a case and use it for something else, which is not only environmentally conscious but very customer-friendly.

Now the first third-party Framework mainboard is coming, and it's not x86: it's RISC-V, and it fits in their 13" chassis. A RISC-V option is of course not new in portable computers; I reviewed the ClockworkPi RISC-V DevTerm a couple years ago, which can take either an RPi ARM compute module or an Allwinner D1 based on the 1GHz RV64IMAFDCVU XuanTie C906. However, the CPU is more powerful than that, a quad-core StarFive JH7110 with four SiFive U74 cores. The new Framework mainboard is based on an existing DeepComputing laptop product called "Roma;" DeepComputing now sells a more advanced version in a laptop of their own based on the octocore SpacemiT K1. Combined with the generally well-regarded Framework loadout and creature comforts, this could definitely be a product to watch.

That said, much as I was disappointed with the performance of the RISC-V DevTerm, most people are going to be similarly unimpressed with the performance of this one. Phoronix's benchmarks placed it well below the Raspberry Pi 4 (and the Orange Pi 5 crushed it), and Framework is trying to set expectations low by saying, "The peripheral set and performance aren’t yet competitive with our Intel and AMD-powered Framework Laptop Mainboards." That would certainly be an understatement, and is yet another example of the self-licking RISC-V ice cream cone getting ahead of its skis on real-world throughput. Framework also apologetically notes that the board "has soldered memory and uses MicroSD cards and eMMC for storage, both of which are limitations of the processor." Still, it's (soon to be) available and functional, and it could be mounted in one of those small desktop cases, so if you want a sidecar RISC-V machine to play with you've got another option better than yet another SBC.

But more important than that: it proves that you can put really any architecture on such a board and take advantage of the Framework, uh, framework instead of reinventing the wheel completely. So, instead of these various attempts at building a PowerPC laptop, why isn't there a Power ISA Framework mainboard? Wouldn't that approach just make more sense?